HD64F7047F50V - Renesas Technology Corp - Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Quick Detail:

Renesas 32-Bit RISC Microcomputer SuperHTMRISC engine Family/SH7000 Series

Description:

The SH7047 group single-chip RISC (Reduced Instruction Set Computer) microprocessors integrate a Renesas-original RISC CPU core with peripheral functions required for system configuration.

The SH7047 group CPU has a RISC-type instruction set. Most instructions can be executed in one state (one system clock cycle), which greatly improves instruction execution speed. In addition, the 32-bit internal-bus architecture enhances data processing power. With this CPU, it has become possible to assemble low cost, high performance/high-functioning systems, even for applications that were previously impossible with microprocessors, such as real-time control, which demands high speeds.

In addition, the SH7047 group includes on-chip peripheral functions necessary for system configuration, such as large-capacity ROM and RAM, timers, a serial communication interface

(SCI), Controller area network 2 (HCAN2), an A/D converter, an interrupt controller (INTC), and I/O ports. ROM and SRAM can be directly connected to the SH7047 MCU by means of an external memory access support function. This greatly reduces system cost.

There are two versions of on-chip ROM: F-ZTATTM (Flexible Zero Turn Around Time) that includes flash memory, and mask ROM. The flash memory can be programmed with a programmer that supports SH7047 group programming, and can also be programmed and erased by software. This enables LSI chip to be re-programmed at a user-site while mounted on a board.

Applications:

• Central processing unit with an internal 32-bit RISC (Reduced Instruction Set Computer) architecture

 Instruction length: 16-bit fixed length for improved code efficiency

 Load-store architecture (basic operations are executed between registers)

Sixteen 32-bit general registers

 Five-stage pipeline

 On-chip multiplier: multiplication operations (32 bits × 32 bits → 64 bits) executed in two to four cycles

 C language-oriented 62 basic instructions

• Various peripheral functions

 Data transfer controller (DTC)

 Multifunction timer/pulse unit (MTU)

 Motor management timer(MMT)

 Compare match timer (CMT)

 Watchdog timer (WDT)

 Asynchronous or clocked synchronous serial communication interface(SCI)

 10-bit A/D converter

 Clock pulse generator

 Controller area network2 (HCAN2)

 User break controller (UBC)*

 High-performance user debug interface (H-UDI) *

 Advanced user debugger (AUD)*

Specifications:

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Warranty :180 days !
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(goods weight below 3Kg) ,during 20130901-20130930 .

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